ReticleIC
Open IC design, from RTL to reticle.
Layout, DRC, LVS, parasitic extraction and an RTL environment on one Rust engine, running in your browser, on your desktop or in the cloud. Open source, and built to replace the tools it starts on.
Real blocks, down to the fin.
ReticleIC grows out of OpenLayout, a custom-design flow for the ASAP7 7 nm FinFET PDK. This INT8x8 compute-in-memory array was drawn, checked and extracted with it, and it’s the kind of design the new engine is being built to open in a browser tab.
Write it once. Run it anywhere a design is.
Geometry, GDS, DRC, LVS and extraction live in one platform-free Rust core. The interface doesn’t care where a job runs: the same command works on your laptop or on a hundred cores.
Open a layout and run checks locally, with nothing to install. Heavy work runs in Web Workers, so the page never freezes.
The same engine and UI as a native app for macOS, Windows and Linux, for designs too big for a browser tab.
Full-chip DRC, LVS and extraction on as many cores as the job needs, streaming results back as they finish.
Everything a cell needs, in one place.
A GPU canvas built for millions of polygons, with layer toggles, hierarchy and cross-probing.
Design rule checks from a small rule language that compiles to a graph the engine can share, parallelise and tile.
Layout against schematic, with FinFET device extraction: fin counts, threshold flavours and split gates.
Parasitic extraction feeding straight into post-layout simulation.
A Verilog and SystemVerilog editor, simulation, synthesis and a canvas waveform viewer.
Every action is a command: from the console, a menu, a shortcut or a script, all logged to a replayable journal.
Every click is a command.
Menus, buttons, shortcuts and scripts all call the same named commands, and every one is written to a journal you can replay or turn into a script. Ctrl+K finds any of them.
› library.open mac8
› layout.load "INT8_ARRAY.gds"
loaded 12 cells · 6.05 × 1.12 µm
› drc.run deck="asap7.rdk"
› ▍Design rules you can read.
A small language on top of the engine. Each line builds a node in a graph, so the engine sees the whole deck at once: it reuses shared layers, runs independent checks in parallel and tiles large layouts. Existing open-PDK decks will translate in.
m1 = layer(30, 0)
via1 = layer(31, 0)
check width(m1) >= 0.036
check spacing(m1) >= 0.036
check enclosure(via1, m1) >= 0.005
gate = poly & active
check width(gate) >= 0.020Standing on open tools, for now.
ReticleIC starts on the best open source EDA tools, behind its own interfaces. Each one is replaced by an in-house engine when that engine is ready, without changing how you work.
Built in the open.
ReticleIC is early. Until the first release, OpenLayout is where the work happens.